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POWER MANAGEMENT Description
The SC4905A/B is a 10 pin BICMOS primary side voltage mode controller for use in Isolated DC-DC and off-line switching power supplies. It is a highly integrated solution, requiring few external components. The device features a high speed oscillator with integrated feed forward compensation, accurately programmable maximum duty cycle, voltage mode of operation, line voltage monitoring, supply UVLO, low start up current, low voltage current limit threshold and user accessible reference. The SC4905A/B device operates at a fixed frequency, highly desirable for Telecom applications. Features a separate SYNC pin which simplifies synchronization to an external clock. Feeding the oscillator of one device to the SYNC of another forces biphase operation (180 degrees apart) which reduces input ripple and filter size. The SC4905A has a turn-on threshold of 4.5V and the SC4905B has a turn-on threshold of about 12 volts. These devices are available in the 10 lead MSOP package.
High Performance Voltage Mode PWM Controller
PRELIMINARY Features
K Operation to 1MHz K Accurate programmable maximum duty cycle K Integrated oscillator/voltage feed forward K K K K K K K K
SC4905A/B
compensation Line voltage monitoring External frequency synchronization Bi-phase mode of operation for ripple reduction Under 100A start-up current Accessible reference voltage VDD undervoltage lockout -40C to 105C operating temperature 10 lead MSOP package
Applications
K K K K K
Telecom equipment and power supplies Networking power supplies Power over LAN applications Industrial power supplies Isolated power supplies
Typical Application Circuit
Revision 4, April 2002
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SC4905A/B
POWER MANAGEMENT Absolute Maximum Ratings
Parameter Supply Voltage Input Voltage (RC, ILIM) Input Voltage (VFF) Input Current (VFF) Input Voltage (FB) Output Current (REF) DC Power Dissipation Storage T mperature Range e Junction T mperature e Lead T mperature (Soldering) 10 Sec. e TSTG TJ TLEAD
PRELIMINARY
Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters specified in the Electrical Characteristics section is not implied.
Symbol
Maximum 18 VREF + 0.3 6 2 VREF + 0.7 5 180 -65 to +150 -55 to +150 +300
Units V V V mA V mA mW C C C
Electrical Characteristics
Unless otherwise specified, VDD = 12V, VIN = 48V, ROSC = 499k, COSC = 220pF, RT = 280k, RM = 2k, RB = 8.25k, CVDD = 0.1uF, and no load on the outputs.
Parameter Supply Curent Section Startup Current IDD Active Line Under Voltage Lockout Start Threshold Hysteresis IIB (VFF) Oscillator Section Maximum Frequency CT Peak Voltage
Test Conditions
Min
Typ
Max
Unit
VDD = UVLO Start - 1, VDD Comparator Off VDD = Comparator On, Oscillator Running 4
100
A mA
Voltage measured at VFF pin
1.2V +/- 3% 100
V mV 100 nA
VFF = 1.2V +/- 3%
-100
VFF = 1.2V to 4.8V VFF = 1.2V VFF = 3.6V
0.8
1.0 1.2 3.6 200
1.2
MHz V V mV
CT Valley Voltage Sync/CLOCK Clock SYNC Threshold Sync Input Detect Time Sync Output Response Time
2002 Semtech Corp.
.5 *VFF FSYNC > Fosc FSYNC < Fosc
2
V nS TBD S
50
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SC4905A/B
POWER MANAGEMENT Electrical Characteristics (Cont.)
Parameter Sync/CLOCK (Cont.) Sync Frequency Range Current Limit Section Input Bias Current Current Limit Threshold Propagation Delay, ILIM to OUT VREF Section VREF (A version) VREF (B version) VDD UVLO Section (A version) Start Threshold Hysteresis VDD UVLO Section (B version) Start Threshold Hysteresis Pulse Width Modulator Section FB Input current Minimum Duty Cycle Maximum Duty Cycle VDMAX = VFF PWM Gain Propagation Delay, PWM to OUT Output Output VSAT Low Output VSAT High Rise Time Fall Time IOUT = 1mA IOUT = 1mA COUT = 20pF COUT = 20pF VREF - 0.5 10 10 25 25 500 mV V ns ns VFF = 3.6 90 27.7 75 120 VFB = 0V to Vref+300mV VFB < 500mV 78 1 0 uA % % % %/V ns 11 12 4 V V 4.1 4.5 300 V mV 0 - 5mA 0 - 5mA -3% -3% 4 5 +3% +3% V V 50mV Overdrive 0 200 35 -2 A mV ns FOSC + 50 Hz Test Conditions Min Typ
PRELIMINARY
Unless otherwise specified, VDD = 12V, VIN = 48V, ROSC = 499k, COSC = 220pF, RT = 280k, RM = 2k, RB = 8.25k, CVDD = 0.1uF, and no load on the outputs.
Max
Unit
Note 1: Guaranteed by design. Not 100% tested in production.
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SC4905A/B
POWER MANAGEMENT Pin Configuration
(Top view)
PRELIMINARY Ordering Information
Part Number Package MSOP-10 Temp. Range (TJ) -40C to 105C SC4905AIMSTR SC4905BIMSTR
VDD FB VFF DMAX RC
(MSOP-10)
REF OUT GND ILIM SYNC
Note: Only available in tape and reel packaging. A reel contains 2500 devices.
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SC4905A/B
POWER MANAGEMENT Pin Descriptions
VDD: The supply input for the device. Once VDD has exceeded the UVLO limit, the internal reference, oscillator, drivers and logic are powered up. This pin should be bypassed with a low ESR capacitance right at the IC pin to minimize noise problems, and to ensure proper operation. FB: Input to the PWM comparator with an offset voltage of 700mV. The feedback analog signal from the output of an error amplifier or an Optoisolator will be connected to this pin to provide regulation. VFF: The VFF pin provides the controller with a voltage proportional to the power supply input voltage to achieve feed-forward function. RM plus RB in conjunction with RT will set the Vff level (see page 1 circuit).
VFF =
PRELIMINARY
Where VFF is the voltage at the VFF pin at a given Vin, frequency is in Hertz, resistance in ohms, and capacitance in farads. The recommended range if timing resistors is between 10 kohm and 500kohm and range of timing capacitors is between 100pF and 1000pF. Timing resistors less than 10 kohm should be avoided. Refer to layout guide lines on page 16 to achieve best results. SYNC: SYNC is a positive edge triggered input with a threshold precisely set to 0.5*VFF In the Bi-Phase operation mode SYNC pins should be connected to the Cosc (Timing Capacitors) of the other controller. This will force a 180 out of phase operation. (see page9). In a single controller operation, SYNC could be grounded or connected to an external synchronization clock with Frequency higher than the on board oscillator Frequency (see page 2). ILIM: Current sense input is provided via the ILIM pin. The current sense input from a sense resistor provides a pulse by pulse current limit by terminating the PWM pulse when the input is above 200mV. GND: Device power and analog ground. Careful attention should be paid to the layout of the ground planes (see page 12). OUT: The output is intended to drive an external FET driver or other high impedance circuit. The output voltage swings from GND to Vref with a typical output impedance of 500. REF: The REF pin provides a 4 or 5V user accessible voltage reference. This pin should be decoupled with a 1F capacitor.
(RT + RB + RM )
(RB + RM)
DMAX: Programmable duty cycle is achieved via resistive divider from the VFF. The duty cycle percentage is set by the ratio of the divider RM, and RB (see page 1 circuit) from the VFF signal. When RM is shorted, maximum duty cycle of 100% is achieved. RM plus RB in conjunction with RT will also be used as the divider to set the Vff level.
DutyCycle% = VDMAX VFF
RC: The oscillator programming pin. The oscillator should be referenced to Vin to achieve the line feed forward function. Only two components are required to program the oscillator, a resistor ROSC (tied to the Vin and RC), and a capacitor COSC (tied to the RC and GND). Since the peak oscillator voltage is VFF, constant frequency operation is maintained over the full power supply. When the DMAX pin is shorted to the VFF pin, the oscillator can run at the largest duty cycle possible. Following formula can be used for a close approximation of the Oscillator Frequency.
VFF Vin - 2 (ROSC * COSC * VFF * 1.05)
FOSC
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SC4905A/B
POWER MANAGEMENT Block Diagram PRELIMINARY
Marking Information
Top Mark
4905 yyww
Bottom Mark
xxxx
yyww =Datecode (Example: 9912) xxxxx =Semtech Lot # (Example: 90101)
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SC4905A/B
POWER MANAGEMENT Application Information
THEORY OF OPERATION The SC4905 is a versatile 10 pin BICMOS primary side voltage mode controller optimized for applications requiring minimum space such as isolated DC-DC and off-line switching power supplies. The device contains all of the control and drive circuity required for isolated or non-isolated power supplies, where an external error amplifier is used. Fixed oscillator frequency up to 1MHz can be programmed by an external RC network. The SC4905 is a voltage mode controller, utilizing a feed forward scheme to accommodate for any variations in the input supply voltage resulting in a duty cycle adjustment. This feed forward action results in an improved dynamic performance of the converter. The SC4905 also provides a programmable maximum duty cycle to prevent core saturation when a transformer is used. As an added level of protection, SC4905 provides a cycle by cycle peak current limit during an over current condition. SUPPLY A single supply, VDD is used to provide the bias for the internal reference, oscillator, drivers, and logic circuitry of the SC4905. PWM CONTROLLER The SC4905 is a BICMOS primary side voltage mode controller for use in isolated DC-DC and off-line switching power supplies. It is a highly integrated solution, requiring few external components. The device features a high speed oscillator with integrated feed forward compensation, accurately programmable maximum duty cycle, voltage mode of operation, line voltage monitoring, supply UVLO, low start-up current, low voltage current limit threshold and user accessible reference. Two voltage options are available for the SC4905. The SC4905A version has a typical VDD under voltage of 4V, and a 4V reference, while the SC4905B version provides a 12V VDD UVLO, and a 5V reference. The Oscillator frequency is programmed by a resistor and a capacitor network connected to the line supply voltage . Any variations in the input supply voltage result in a duty cycle adjustment, provided by the change of the oscillator peak voltage via the VFF pin.
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PRELIMINARY
This feed forward action provides an immediate duty cycle adjustment while maintaining a constant oscillator frequency. A maximum duty cycle can be programmed by connecting a resistor divider from the VFF to the DMAX pin. The scaling of the VFF signal will set the maximum duty cycle percentage. An external error amplifier will provide the error signal to the FB pin of the SC4905. A current sense input is provided via the ILIM pin. The current sense input from a sense resistor is used for the peak current limit comparator. Once VDD has exceeded the UVLO (VDD under voltage lock out) limit, the internal reference, oscillator, drivers and logic are powered up. SYNC is a positive edge triggered input with a threshold set to 0.5*VFF. By connecting a faster external control signal to the SYNC pin, the internal oscillator frequency will be synchronized to the positive edge of the external control signal. In a single controller operation, SYNC could be grounded or connected to an external synchronization clock within the SYNC frequency range (see page 3). In the Bi-Phase operation mode a very unique oscillator is utilized to allow two SC4905 to be synchronized together and work out of phase. This feature is setup by simple connection of the SYNC input to the RC pin of the other part. The fastest oscillator automatically becomes the master, forcing the two PWMs to operate out of phase. This feature minimizes the input and output ripples, and reduces stress on the capacitors.
Device
SC4905A SC4905B
Typ. Vcc UVLO
4.5V 12.5V
Reference V ltage o
4V 5V
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SC4905A/B
POWER MANAGEMENT Application Information (Cont.)
VDD UNDER VOLTAGE LOCK OUT According to the application, and the voltages available, the SC4905A (UVLO = 4.5V), or the SC4905B (UVLO = 12.5V) can be used to provide the VDD undervoltage lock out function to ensure the converters controlled start up. Before the VDD UVLO has been reached, the internal reference, oscillator, OUT driver, and logic are disabled. REFERENCE A 4V (SC4905A) or a 5V(SC4905B) reference voltage is available that can be used to source a typical current of 3mA to the external circuitry. The REF can be used to provide the feed back circuitry with a regulated bias. OSCILLATOR The oscillator frequency is set by connecting a RC network as shown below.
Vin
PRELIMINARY
Following equation can be used to calculate the oscillator frequency:
VFF Vin - 2 (ROSC * COSC * VFF * 1.05)
FOSC
The recommended range if timing resistors is between 10 kohm and 500kohm and range of timing capacitors is between 100pF and 1000pF. Timing resistors less than 10 kohm should be avoided.
SC4905
U1 RT 280k Rosc 499k
1 2 3 VDD FB VFF DMAX RC REF OUT GND ILIM SYNC 10 9 8 7 6
RM 2k
4 5
RB 8.25k
Cosc 220p, 16V
The oscillator has a ramp voltage that will track the voltage at the VFF pin (1.2V 2002 Semtech Corp.
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SC4905A/B
POWER MANAGEMENT Application Information (Cont.)
FEED FORWARD & MAXIMUM DUTY CYCLE The feed forward function provided by the SC4905 will improve the dynamic performance of the converter in response to the changes in the input supply. In voltage mode controllers without the voltage feed forward circuitry, any changes in the input supply will cause an error in the output voltage which is sensed by the error amplifier and eventually is translated to an adjustment in the duty cycle by the controller. This delay in the response will cause the slower dynamic performance of the converter. This problem is resolved by sensing the input supply line and making the adjustment in the duty cycle immediately at the PWM controller. If the application does not require an upper limit on the duty cycle, the VFF pin should be connected to the DMAX pin. In this mode, the duty cycle will be allowed to increase to the maximum limit of about 100%. SYNC/Bi-Phase operation In noise sensitive applications where synchronization of the oscillator frequency to a reference frequency is required, the SYNC pin can accept the external clock.By connecting an external control signal to the SYNC pin, the Internal oscillator frequency will be synchronized to the positive edge of the external control signal. SYNC is a positive edge triggered input with a threshold set to 0.5*VFF. In a single controller operation, SYNC chould be grounded or connected to an external synchronization clock within the SYNC frequency range (see page 3).
10 9 8 7 6
Rosc1 1 2 3 4 5 Cosc1 VDD FB VFF DMAX RC VIN
PRELIMINARY
Vin
5+"'#
U1 R14 R15 499k 1 2 3 R16 2k 4 5 VDD FB VFF DMAX RC REF OUT GND ILIM SYNC 280k
Shut Down
7
REF OUT GND ILIM SYNC 10 9 8 7 6 Cosc2 Rosc2 1 2 3 4 5 VDD FB VFF
7
REF OUT GND ILIM SYNC 10 9 8 7 6
R18 8.25k
C27 220p, 16V
DMAX RC
5+"'#
5+"'#
The SC4905 uses the input supply line as the bias for the oscillator circuitry, and the VFF pin. Any changes in the line will cause the ramp peak voltage to be adjusted to the VFF pin voltage while maintaining the oscillator frequency unchanged. The VFF pin can also be used to shut down the SC4905 if it is pulled down to GND by an open collector circuitry. This can be useful for overvoltage protection or other control signals. The SC4905 also provides a programmable duty cycle, that can be set by an external voltage divider from the VFF pin. The ratio of the divider will determine the programmed duty cycle allowed.
DutyCycle% = VDMAX VFF
In the Bi-Phase operation mode a very unique oscillator is utilized to allow two SC4905 to be synchronized together and work out of phase. This feature is setup by simple connection of the SYNC input to the RC pin of the other part. The fastest oscillator automatically becomes the master, forcing the two PWMs to operate out of phase. This feature minimizes the input and output ripples, and reduces stress on the capacitors.
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SC4905A/B
POWER MANAGEMENT Application Information (Cont.)
FEED BACK The error signal from the output of an external Error amplifier such as SC431 or SC4431 is applied to the inverting input of the PWM comparator at the FB pin either directly or via an opto coupler for the Isolated applications. For best stability keep the FB trace length as short as possible.
8 REF R22 1.1k FB C30 NA 7 1 2 4.7nF C36 R24 3.74k 5 MOCD207 4 R29 NA Secondary Supply Vout C33 680pF R26 80.2k R23 5.1k
PRELIMINARY
GATE DRIVERS OUT is a CMOS gate drive output stage that is supplied from REF and provides a peak source/sink current of about 1mA. The output stage is capable of driving the logic input of external MOSFET Drivers and is switched at the oscillator frequency. When the voltage on the RC pin is rising,, the output is high. It should be noted that if high speed/high current drivers such as the SC1301 are used, careful layout must be followed in order to minimize stary inductance, which might cause negative voltages at the output of the drivers. This negative voltage can be clamped to reasonable level by placing a small Schottky diode directly at the output of the driver as shown below.
REF
0
22pF C32 1nF
C31 R25 100k
6
3
5 C35 22n, 16V
1 4 U6
C34 0.1u,16V
5+""!
8HAB
R27 9.1k
2
VDD
VDD
Mosfet Gate
5+"'#
R13
5+!)
3 1 5 D8 4 2 U2 D11
The signal at the FB pin is then compared to the ramp signal from the RC pin and the OUT gate drive signal is generated. Voltages below 600mV at the FB pin, will produce a 0% duty cycle at the OUT drive. Maximum duty cycle is produced when VFB-600mV>VFF. The FB signal range is from 600mv to 4V. OVER CURRENT A pulse by pulse current limit is provided by the SC4905. The current information is sensed at the ILIM pin and compared to a peak current limit level of 200mV. If the 200mV limit is exceeded, the OUT pulse is terminated.
REF VDD
U1 1 2 3 4 5 VDD FB VFF DMAX RC REF OUT GND ILIM SYNC 10 9 8 7 6 C22
C17
C18
SOFT START During start up of the converter, the discharged output capacitor, and the load current demand large supply current requirements. To avoid this a soft start scheme is usually implemented where the duty cycle of the regulator is gradually increased from 0% until the soft start duration is elapsed. Programmable soft start duration can implemented externally by utilizing a simple external circuitry shown below.
REF
5+"'#
1 2 3 4 5 U1 VDD FB VFF DMAX RC REF OUT GND ILIM SYNC 10 9 8 7 6 C26 C17 C22
R13 0
SC4905
U1 1 2 3 56.2K 4 5 VDD FB VFF DMAX RC REF OUT GND ILIM SYNC 9 8 7 6
R22 1.1k
3
M1
6
C30
4
R17 R30 R11 VDD D7
5
MOCD207
Rsense
D15
Csoft start
5+!)
C18 1 35 4 D11 D8
Approximate soft start duration can be calculated as below:
U2 2
TSoftStart CSoftStart x R22
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SC4905A/B
POWER MANAGEMENT Application Information (Cont.)
START UP SEQUENCE Initially during the power up, the SC4905 is in the under voltage lock out condition. As the VDD supply exceeds the UVLO limit of the SC4905 and the VFF pin exceeds the line under voltage lock out of about 1.2V, the internal reference, oscillator, and logic circuitry are powered up. The OUT driver is not enabled until the line under voltage lock out limit is reached. At that point, once the FB pin has reached above 600mV, the output driver is enabled. As the output voltage starts to increase, the error signal from the error amplifier starts to decrease. If isolation is required, the error amplifier output can drive the LED of the opto isolator. The output of the opto is connected in a common emitter configuration with a pull up resistor to a reference voltage connected to the FB pin of the SC4905. The voltage level at the FB pin provides the duty cycle necessary to achieve regulation.
PRELIMINARY
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SC4905A/B
POWER MANAGEMENT Application Information (Cont.)
LAYOUT GUIDELINES Careful attention to layout requirements are necessary for successful implementation of the SC4905 PWM controller. High currents switching are present in the application and their effect on ground plane voltage differentials must be understood and minimized. 1). The high power parts of the circuit should be laid out first. A ground plane should be used. The number and position of ground plane interruptions should be such as to not unnecessarily compromise ground plane integrity. Isolated or semi-isolated areas of the ground plane may be deliberately introduced to constrain ground currents to particular areas, for example the input capacitor and FET ground. 2). The loop formed by the Input Capacitor(s) (Cin), the FET must be kept as small as possible. This loop contains all the high current, fast transition switching. Connections should be as wide and as short as possible to minimize loop inductance. Minimizing this loop area will a) reduce EMI, b) lower ground injection currents, resulting in electrically cleaner grounds for the rest of the system and c) minimize source ringing, resulting in more reliable gate switching signals. 3). The connection between FETs and the Transformer should be a wide trace or copper region. It should be as short as practical. Since this connection has fast voltage transitions, keeping this connection short will minimize EMI. 4) The output capacitor(s) (Cout) should be located as close to the load as possible. Fast transient load currents are supplied by Cout only. Connections between Cout and the load must be short, wide copper areas to minimize inductance and resistance. 5) The SC4905 is best placed over a quiet ground plane area. Avoid pulse currents in the Cin FET loop flowing in this area. GND should be returned to the ground plane close to the package and close to the ground side of (one of) the VDD supply capacitor(s). Under no circumstances should GND be returned to a ground inside the Cin and FET loop. This can be achieved by making a star connection between the quiet GND planes that the SC4905 will be connected to and the noisy high current GND planes connected to the FETs. 6) The feed back connection between the error amplifier and the FB pin should be kept as short as possible, and the GND connections should be to the quiet GND used for the SC4905.
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PRELIMINARY
7) If an opto isolator is used for isolation, quiet primary and secondary ground planes should be used. Same precautions should be followed for the primary GND plane as mentioned in item 5 mentioned above. For the secondary GND plane, the GND plane method mentioned in item 4 should be followed. 8) All the noise sensitive components such as VFF, DMAX resistive divider, reference by pass capacitor, VDD bypass capacitor, current sensing circuitry, feedback circuitry, and the oscillator resistor/capacitor network should be connected as close as possible to the SC4905. The GND return should be connected to the quiet SC4905 GND plane. 9) The connection from the OUT of the SC4905 should be minimized to avoid any stary inductance. If the layout can not be optomized due to constraints, a small Schottky diode maybe connected from the OUT pin to the ground directly at the IC. This will clamp excessive negative voltages at the IC. If drivers are used, the Schottky diodes should be connected directly at the IC, from the output of the driver to the driver ground. 10) If the SYNC function is not used, the SYNC pin should be grounded at the SC4905 GND to avoid noise pick up.
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SC4905A/B
POWER MANAGEMENT Typical Step Load PRELIMINARY
Vout 20mV/Div
Iout 0.5A/Div
500us/Div
Cout = 6X100uF (600uF) Tantalum
Typical SC4905 Forward converter Step Load plot at Vin = 48V, Vout = 12V, Step = 50% to 75% Iout, Fosc = 245kHz
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SC4905A/B
POWER MANAGEMENT Typical Characteristics PRELIMINARY
D B T
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SC4905A/B
POWER MANAGEMENT Typical Characteristics (Cont.) PRELIMINARY
D B T
2002 Semtech Corp. 15 www.semtech.com
SC4905A/B
PRELIMINARY
CON1 L2 LQH4N102K04
2 6
VDD C16 10u,16V GRM42-2X5R106K16 (Murata) D5 LS4448
5 3 4 12 11 10 1 3
1
D4 LS4448
9
Vou
PA0273
C1 470pF,100VR1 10 L1
4 1
R2
8
P1173
2 4
T491X107K016AS
D1 MBRD660CT 10 R5 D2 9uH 470pF,100V C11 + + + +
0
Sen
CON2
R3
1
Vin+
GRM44-1X7R105K250AL (Murata) 1u,100V 1u,100V
B 2 1
49.9k FZT853 Q1 C C10 5000 5000 MURA120T3
3
R4 500 R6 D3 R7
.47uF,100V
+
+
7 8 7 9 1 3
C2 C3 C4 C5 C6 C7 C8 100u,16V 100u,16V 100u,16V 100u,16V 100u,16V 100u,16V 0.1u,16V T1 MBRD660CT
C9
Trim
0.1u,16V
ON/OFF
E
2
C12
C13
VDD
R9
R8 TBD
ZM4742A
VDD = 12V
C14 0.1u,16V R30 39.2k 2.2 R10 R11 LR2512-01-R025FTR D7 1N5819HW
2
M1 SUD15N15-95
1
.33uF,250V C37
6
0
Sen
Vin4
C15 10u,16V
D6
5
Vo
3input_half_brick
5output_half_brick
GRM42-2X5R106K16 (Murata)
R12 TBD
J1 REF
J2 VDD
SC4905
R14 280k
FB VFF DMAX RC SYNC 6 ILIM 7 GND 8 OUT 3 4 5
R13 0 C17 1u, 16V C18 1u, 16V
VDD
VDD
Secondary Supply
SC1301A
OUT
1 35 4
SC1301A
D8 CMOSH-3 C21 1u, 16V
35 1
D14 B140T CMOSH-3 D9
4
499k
2
9
CMOSH-3 500 R17 D11 CMOSH-3 1u, 16V U2 U3 D12 C24 CMOSH-3
3 2 2 4
1u, 16V
R16 2k 220p, 16V JP1 R18 8.25k 220p, 16V C27 SYNC1
D15 C26
PE-68386
CMOSH-3
D13 CMOSH-3
C25
GRM42-2X5R106K16 (Murata)
Secondary Supply R19 1.1k R28 2.2k
SC4431
5 1
R20 39.2k U5 C28 C29 0.1u,16V 22n, 16V
8 1
4
POWER MANAGEMENT Evaluation Board Schematics
U4 REF R22 1.1k C30 NA
7
2
R21 3.74k
8HAB
6 5
3 4
2
4.7nF C36
Secondary Supply
SEMTECH CORPORATION
Title Size SC4905 Single Switch Forward (RCD Reset) non Synchronous 12V 50W Document Number SC4905EVB Date: Monday, January 28, 2002 Sheet 1 of 1 Rev 1b
MOCD207
R24 3.74k R29 NA
SC4431
1 5
22pF
C31
C32
R25
C33 680pF
1nF
100k
R26 80.2k C34 C35 0.1u,16V 22n, 16V
R23 5.1k
4
U6
R27 9.1k
8HAB
2
2002 Semtech Corp.
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R15
1 VDD REF
U1
10
1u, 16V C19
C22 2.2u, 16V
1 T2
6
D10
1u, 16V C20 C23 10u,16V
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SC4905A/B
POWER MANAGEMENT Evaluation Board Bill of Materials
Revised: Monday, January 28, 2002 SC4905 Single Switch Forward (RCD Reset) non Synchronous 12V 50W Bill Of Materials Item
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61
PRELIMINARY
Revised: January 28,2002 Reference
CON1 CON2 C11,C1 C2,C3,C4,C5,C6,C7 C8,C9,C14,C28,C34 C10 C12,C13 C15,C16,C23 C17,C18,C19,C20,C21,C24, C25 C22 C26,C27 C29,C35 C30 C31 C32 C33 C36 C37 D1,D2 D3 D4,D5 D6 D7 D8,D9,D10,D11,D12,D13, D15 D14 JP1 J1 J2 L1 L2 M1 OUT Q1 R5,R1 R2,R9,R13 R3 R4 R6,R7 R8,R12 R10 R11 R14 R15 R16 R17 R18 R22,R19 R20,R30 R24,R21 R23 R25 R26 R27 R28 R29 SYNC1 T1 T2 U1 U2,U3 U4,U6
Revision: 1b Part Manufacturer # Foot Print
CON\5OUTPUT_HALF_BRICK CON\3INPUT_HALF_BRICK SM/C_0805 EEJL1CD476R SM/C_0805 SM/C_2220 SM/C_2220 SM/C_1210_GRM SM/C_0805 SM/C_0805 SM/C_0805 SM/C_0805 SM/C_0805 SM/C_0805 SM/C_0805 SM/C_0805 SM/C_0805 SM/C_2220 DIODE_DPAK SM/DO214AA SM/DO213AC SMB/DO214 SOD123 SOD523 SM/DO213AC VIA\2P ED5052 ED5052 P1173 SDIP0302 DPAKFET ED5052 SM/SOT223_BCEC SM/R_0805 SM/R_0805 SM/R_1206 SM/R_1210_MCR SM/R_1210_MCR SM/R_0805 ERJL1W SM/R_0805 SM/R_0805 SM/R_0805 SM/R_0805 SM/R_0805 SM/R_0805 SM/R_0805 SM/R_0805 SM/R_0805 SM/R_0805 SM/R_0805 SM/R_0805 SM/R_0805 SM/R_0805 SM/R_0805 ED5052 PA0273 PE-68386 MSOP10 SOT23_5PIN SOT23_5PIN
Quantity
1 1 2 6 5 1 2 3 7 1 2 2 1 1 1 1 1 1 2 1 2 1 1 7 1 1 1 1 1 1 1 1 1 2 3 1 1 2 2 1 1 1 1 1 1 1 2 2 2 1 1 1 1 1 1 1 1 1 1 2 2
5output_half_brick 3input_half_brick 470pF,100V 100u,16V 0.1u,16V .47uF,100V 1u,100V 10u,16V 1u, 16V 2.2u, 16V 220p, 16V 22n, 16V NA 22pF 1nF 680pF 4.7nF .33uF,250V MBRD660CT MURA120T3 LS4448 ZM4742A 1N5819HW CMOSH-3 B140T short REF VDD 9uH LQH4N102K04 SUD15N15-95 OUT FZT853 10 0 49.9k 500 5000 TBD LR2512-01-R025FTR 2.2 280k 499k 2k 500 8.25k 1.1k 39.2k 3.74k 5.1k 100k 80.2k 9.1k 2.2k NA SYNC PA0273 PE-68386 SC4905 SC1301A SC4431
GHM1545X7R474K250 (Murata) GRM44-1X7R105K250AL (Murata) GRM42-2X5R106K16 (Murata)
GHM1545X7R334K250 (Murata)
ZM4742A (Diodes Inc.) CMOSH-3 (Central Semiconductor)
P1173.123T (Pulse) LQH4N102K04 (Murata) SUD15N15-95 (Vishay) FZT853 (Zetex)
MRC1-100-5000-F-7 MRC1-100-5001-F-7 LR2512-01-R025FTR (IRC)
PA0273 (Pulse) PE-68386 (Pulse) SC4905 (Semtech) SC1301A (Semtech) SC4431 (Semtech)
2002 Semtech Corp.
17
www.semtech.com
SC4905A/B
POWER MANAGEMENT Evaluation Board Gerber Plots PRELIMINARY
Board Layout Assembly Top
Board Layout Assembly Bottom
Board Layout Top
Board Layout Bottom
2002 Semtech Corp.
18
www.semtech.com
SC4905A/B
POWER MANAGEMENT Evaluation Board Gerber Plots PRELIMINARY
Board Layout INNER1
Board Layout INNER2
2002 Semtech Corp.
19
www.semtech.com
SC4905A/B
POWER MANAGEMENT Outline Drawing - MSOP-10 PRELIMINARY
Land Pattern - MSOP-10
Contact Information
Semtech Corporation Power Management Products Division 200 Flynn Road, Camarillo, CA 93012 Phone: (805)498-2111 FAX (805)498-3804
2002 Semtech Corp.
20
www.semtech.com

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